The present invention relates generally to multiplexed data buses, and more particularly, to a direct memory access method for storing messages received from a multiplexed data bus.
In present ground command, control, communications, and intelligence information systems, the traditional hierarachical architecture under control of a central computer results in an inflexible system configuration. A large percentage of the system development, procurement, and maintenance costs of such systems are attributable to interface circuitry, cables, and connectors, and the like. Typical system specifications require a system architecture capable of continued operation during the failure and repair of individual units, and during operational reconfiguration of the system. This necessitates an interconnect structure containing no critical nodes or central control elements. These requirements may be met by utilizing an interconnect system employing a data bus which is shared by all units which comprises a standard bus interface in each unit.
In a conventional large scale system, the interconnection of computers, processors, displays, and peripheral units requires a unique hierarchical arrangement where the function of a unit is determined by its position in the interconnecting topology. Moreover, the associated interfaces of any one type of unit would change, depending on its location in the topology. The conventional system contains a central computer connected to mini-computers through interface units, which in turn communicate with peripherals, displays and communications equipment by way of specialized controllers.
To ensure continuous operation when unit failures occur, the conventional system is redundant, in that a plurality of complete systems are provided to compensate for unit failure. As the number of units in the system increases, the number of point to point interconnections increases at a greater rate and so do the necessary interface units, cards, and cables. The configuration of the interconnecting elements in the topology may vary from system to system, and hence integration of these various systems is most complex.
To circumvent some of the problems associated with this conventional type of system, a single multiplexed data bus may be employed interconnecting each of the units in the system. The central computer may be eliminated by utilizing distributed processing. The computer units are required to interface only with the data bus. Any computer may perform any role in the system since each computer is connected directly to all other computers, peripherals and displays by way of the multiplexed data bus. Continued operation during the failure of a unit only requires an additional backup unit. The result is reduction in the types and numbers of units in the system, and the number of interface cards per unit. As a result, acquisition and life cycle costs are reduced because inventory and maintenance requirements are alleviated.
When using a single multiplexed data bus, a computer's bus interface may accept messages addressed to it from any unit coupled to the bus, at any time. Since these messages are not solicited by the computer attached to the addressed bus interface, the arrival time and source of the message cannot be determined prior to the acceptance of the message from the bus. When two or more back-to-back messages are addressed to the same computer, the inter-message gap does not allow enough time for a computer to store the received messages using conventional storage techniques. Such conventional techniques include execution of a interrupt receiver routine followed by an input-output driver routine.
The conventional approach is to queue incoming messages before transfer into the computer memory. This requires excess high-speed buffer capacity. Since the inter-arrival rate and length of messages is indeterminate, the probability of buffer overflow increases as the bit rate capacity of the data bus increases. Also, conventional systems utilize considerable processing overhead in moving received messages from one location in memory (buffer area) to another location (work area).
Several techniques are presently used in existing conventional data bus designs to transfer messages into computer memory. One method provides for received messages to be stored in a fixed location in a computer memory whereafter software is required to move the stored messages prior to receipt of additional incoming messages. Otherwise, the newly incoming messages would overwrite the previously received messages, and thus disrupt data flow. Another technique provides for buffering of one or more messages in an external memory. When the buffer is full the overflowing messages and subsequently received messages are lost. The message source is informed of the loss of transmitted messages and directed to retransmit after a time delay. A third technique provides for transmission of a control word which reserves space in memory prior to transmission of the data message. This insures that the proper amount of memory space is allocated for the message to be transmitted. However, this method requires the transmission of several messages to store data. This method also requires processing time to set up a storage area for the data, which slows down operational speed.
Therefore, it would be an improvement in the data processing art to have a method of directly storing received messages in a computer's memory in the appropriate processing area so as to avoid the unnecessary movement of messages in memory from an incoming buffer area to a processing area.
It would also be an improvement in the art to provide a method which avoids the need to delay reception of messages while the computer prepares and sets up for reception of the message.